The present invention relates to devices that can be used to protect integrated circuits against unwanted or unexpected cuts in the power supply so as to prevent data elements from being memorized or erased randomly. The invention can be applied to memories of the electrically programmable type, especially memories of the electrically erasable type.
It is generally known that in integrated circuits, more especially in memories, including programmable memories, a normal supply voltage is used. This supply voltage, conventionally called Vcc, powers the logic circuits of the integrated circuit (and the read circuits of an integrated circuit memory), and is maintained during normal use of the circuit. In the case of programmable memories, another appreciably higher voltage is also used (typically 10-20 Volts). This higher voltage is needed to cause the migration of charges through an oxide layer which is used to program individual cells. This second voltage, commonly called Vpp, is also used in the case of programmable memories which, in addition, are electrically erasable.
It is known that, according to the values currently encountered, the programming of an entire EEPROM memory typically lasts about one second and its erasure about 5 seconds. During this period, any unexpected failure of the first supply voltage Vcc may cause serious problems unless the second voltage Vpp is cut off before the logic has become defective because of the gradual drop in the voltage Vcc. If the logic becomes defective while Vpp is still present, the Vpp voltage may be seen by memory cells which were not intended to be written or erased.
A cut in the power supply to a logic system such as a microprocessor, or a memory during a period without program or erasure operations, generally requires only a re-initialization of the system when the power supply is restored. However, if erroneous data elements have been involuntarily programmed or if accurate data elements have been partially erased, then the reinitialization will not correct these errors, and the system will therefore operate with data elements that are at least partially false. This may lead to catastrophic results. It is possible to conceive of a situation where, in a financial application for example, major sums of money may be credited or debited in the memory of a "chip" card for example when no real transaction should have been recorded.
The approach adopted until now has consisted in making a downline decoupling of the points of access to the memory cells. This is sometimes accomplished by means of the internal logic of the memory when this logic is activated upon the detection of the drop in voltage Vcc, by a monitor circuit. However, the monitor circuit may itself be prevented from operating properly due to the loss of Vcc.
To overcome this drawback, the invention proposes a device for the protection of an integrated circuit against power supply cuts. This integrated circuit is designed to be supplied with at least one normal supply voltage Vcc and with a programming and/or erasure voltage Vpp. The device comprises a means for cut-off inserted in series between the source of the voltage Vpp and the supply input of the integrated circuit corresponding to this source. Also,it contains means to activate these cut-off devices which are connected to the source of the voltage Vcc. This cut-off is activated when the value of the voltage Vcc drops below a certain threshold and before this drop reaches a value starting from which the logic operation of the integrated circuit becomes random.